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Export to hardware for MicroBlaze SDK design from Vivado - Q&A - FPGA Reference Designs - EngineerZone
![Export to hardware for MicroBlaze SDK design from Vivado - Q&A - FPGA Reference Designs - EngineerZone Export to hardware for MicroBlaze SDK design from Vivado - Q&A - FPGA Reference Designs - EngineerZone](https://ez.analog.com/cfs-filesystemfile/__key/communityserver-components-secureimagefileviewer/communityserver-discussions-components-files-323/6b45e1bd0cadb2a41d78b5e73c668c2f.png_2D00_438x376.png?_=636728765662407472)
Export to hardware for MicroBlaze SDK design from Vivado - Q&A - FPGA Reference Designs - EngineerZone
I have a current generated .bit and .hdf files that I want to use in the hardware platform of an existing Vitis project, but when I try to change the platform, I'm
![Export to hardware for MicroBlaze SDK design from Vivado - Q&A - FPGA Reference Designs - EngineerZone Export to hardware for MicroBlaze SDK design from Vivado - Q&A - FPGA Reference Designs - EngineerZone](https://ez.analog.com/cfs-file/__key/communityserver-discussions-components-files/323/82ba170b659cb7e36ada5c15a627368a.png)